1. Field of the Invention
The present invention relates to a test circuit provided in a display device having a pixel area where pixels are arranged in matrix, and to a test method of the display device.
2. Description of the Related Art
In recent years, display devices such as liquid crystal displays (LCDs) and electroluminescence (EL) displays have been increased in screen size and resolution, and highly integrated circuits have been developed by integrating a pixel portion and periphery circuits for controlling the pixel portion over the same substrate.
If an element is damaged in manufacturing steps due to shape defects, electrostatic discharge damage (ESD) or the like, a display device itself cannot operate normally and thus should be removed by quality control. In general, the quality control of a display device is performed for such a module 1200 as shown in FIG. 14A, which is completed by attaching an opposite substrate 1202 to a TFT substrate 1201 over which a source driver 1203, a gate driver 1204, a pixel area 1205, a signal input terminal 1206 and the like are formed. Then, as shown in FIG. 14B, a signal is inputted to the module 1200 using a jig or the like, and images (test pattern 1212 and the like) are actually displayed to determine the presence or absence of a defect by viewing a screen.
However, such a method is disadvantageous in that the display device is tested when it is almost completed as the module 1200, and thus the module determined to be defective costs much. In other words, since defects due to circuit malfunction are caused only by the TFT substrate 1201, steps of attaching the opposite substrate 1202 and the like are not necessary. There is also a case where only a substrate (TFT substrate) over which a pixel portion and a periphery circuit are formed using TFTs and the like is produced and shipped as a semi-finished product. In this case, however, quality control cannot be performed by actually displaying images, and a means for determining whether a circuit over a TFT substrate operates normally is required.
FIG. 13 shows an example of a configuration to achieve such quality control. A digital source driver 18 having a shift register (SR), a NAND circuit, a latch, a D/A converter (DAC) and the like, a gate driver 5, a pixel area where pixels 3 are arranged in matrix, and a test circuit having a driver circuit 30, an analog switch 25, a test line 27, a test terminal 28 and the like are formed over a substrate.
In the display device shown in FIG. 13, each gate signal line 6 controls pixels connected to the line, and a video signal is inputted to the digital source driver 18, outputted to a source signal line 9, and written to each pixel.
In the test circuit, the analog switch 25 is controlled by the driver circuit 30, and charges held when a video signal is written to a pixel are outputted to the test terminal 28 through the test line 27, thereby determining whether writing to the pixel is good or bad (see Patent Document 1). There is another test method where a test pad is provided for each source signal line 9 and output is tested by applying a probe to each pad (see Patent Document 2).
As a test method performed before a TFT substrate is attached to an opposite substrate, there is a method where a test capacitor is provided to be connected to a drain region of a driving TFT in a pixel portion, and the charging and discharging of the test capacitor are checked to determine whether the driving TFT operates normally (see Patent Document 3). As another method, electromagnetic induction from a coil is used to drive a circuit over an element substrate, and an electromagnetic wave or an electric filed generated in the circuit is monitored (see Patent Documents 4 and 5).    [Patent Document 1] Japanese Patent Laid-Open No. 2002-116423    [Patent Document 2] Japanese Patent No. 2618042    [Patent Document 3] Japanese Patent Laid-Open No. 2002-032035    [Patent Document 4] Japanese Patent Laid-Open No. 2002-350513    [Patent Document 5] Japanese Patent Laid-Open No. 2003-031814